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As is, there is a lot of stuff covered just for this one section. The main takeaway or of importance is data transfer signal components — such as knowing the different conditions.
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An $\textrm{I}^2\textrm{C}$ is an inter-integrated circuit; a very popular bus widely used for communication.
At a block diagram level, there is the simplest interpretation of $\textrm{I}^2\textrm{C}$. It follows a master/slave model, where the master device controls the clock line (SCL).
Figure 11.1 Basic block diagram of an inter-integrated circuit.
One of the advantages of using $\textrm{I}^2\textrm{C}$ is the low pin count:
SCL signal is the serial clock signal. It used to synchronize data transfer.SDA signal is known as serial data. It is used to carry both the address and data.Note that these are also these two pull-up resistors $R_P$ which will cover in a bit, but just know that they exist.
So internally, how does the $\textrm{I}^2\textrm{C}$ work? A master or a slave device drives the I2C bus using an open-drain (or open-collector) driver.
Figure 11.2 Connecting standard- and fast-mode devices to the I2C bus.
The concept of open-drain driver can get a bit complicated as it dives in the topic of NMOS transistor. Nonetheless, if you are interested, this video provides a great explanation on how it works.
Suppose you want to send data from master to slave or read data from the slave to master, how does it work? An $\textrm{I}^2\textrm{C}$ data transfer consists of the following fundamental signal components:
Start (S): There is something known as a start condition, when the SDA line goes low, then a short time later, the SCL line goes low.
Figure 11.3 $\textrm{I}^2\textrm{C}$ start condition.
This is initiated by the master, to indicate that data transfer is about to occur.